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<p class="MsoNormal">There are currently two functions that generate indices into kmalloc_caches and<o:p></o:p></p>
<p class="MsoNormal">they disagree with each other. This patch fixes the bug to the point that the<o:p></o:p></p>
<p class="MsoNormal">LLVM-compiled kernel successfully boots for Mips but it will need further work<o:p></o:p></p>
<p class="MsoNormal">before upstreaming.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The failing sequence is:<o:p></o:p></p>
<p class="MsoNormal">* kmalloc_caches contains NULL elements<o:p></o:p></p>
<p class="MsoNormal">* kmem_cache_init initialises the element that 'struct kmem_cache_node' will be<o:p></o:p></p>
<p class="MsoNormal"> allocated to. For 32-bit Mips, this is a 56-byte struct and kmalloc_index<o:p></o:p></p>
<p class="MsoNormal"> selects element 7.<o:p></o:p></p>
<p class="MsoNormal">* init_list is called which calls kmalloc_node to allocate a 'struct<o:p></o:p></p>
<p class="MsoNormal"> kmem_cache_node'.<o:p></o:p></p>
<p class="MsoNormal">* kmalloc_slab selects the kmem_caches element using<o:p></o:p></p>
<p class="MsoNormal"> size_index[size_index_elem(size)]. For Mips, size is 56, and the expression<o:p></o:p></p>
<p class="MsoNormal"> returns 6.<o:p></o:p></p>
<p class="MsoNormal">* This element of kmalloc_caches is NULL and allocation fails.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">GCC does not normally encounter this bug. I believe this is because it manages<o:p></o:p></p>
<p class="MsoNormal">to optimise the problematic allocation away. This theory is supported by GCC<o:p></o:p></p>
<p class="MsoNormal">encountering this bug when I disable inlining by changing the definitions of<o:p></o:p></p>
<p class="MsoNormal">inline, __inline, __inline__, and __always_inline in<o:p></o:p></p>
<p class="MsoNormal">include/linux/compiler-gcc.h.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Signed-off-by: Daniel Sanders <a href="mailto:daniel.sanders@imgtec.com">
daniel.sanders@imgtec.com</a><o:p></o:p></p>
<p class="MsoNormal">--<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">This is the first of two patches that fix the boot for Mips.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal" style="text-align:justify"><b><span style="font-size:12.0pt;font-family:"Arial","sans-serif";color:#3333FF">Daniel Sanders<o:p></o:p></span></b></p>
<p class="MsoNormal" style="text-align:justify"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#3333FF">Leading Software Design Engineer, MIPS Processor IP<o:p></o:p></span></p>
<p class="MsoNormal" style="text-align:justify"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#3333FF">Imagination Technologies Limited<o:p></o:p></span></p>
<p class="MsoNormal" style="text-align:justify"><a href="http://www.imgtec.com/"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:blue">www.imgtec.com</span></a><span style="font-size:10.0pt;font-family:"Arial","sans-serif""><o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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