[Bugme-new] [Bug 19952] New: Disabling CPU cores causes system not to boot

bugzilla-daemon at bugzilla.kernel.org bugzilla-daemon at bugzilla.kernel.org
Sat Oct 9 04:06:06 PDT 2010


https://bugzilla.kernel.org/show_bug.cgi?id=19952

           Summary: Disabling CPU cores causes system not to boot
           Product: Platform Specific/Hardware
           Version: 2.5
    Kernel Version: 2.6.35.x
          Platform: All
        OS/Version: Linux
              Tree: Mainline
            Status: NEW
          Severity: normal
          Priority: P1
         Component: x86-64
        AssignedTo: platform_x86_64 at kernel-bugs.osdl.org
        ReportedBy: dandart at googlemail.com
        Regression: No


Created an attachment (id=32972)
 --> (https://bugzilla.kernel.org/attachment.cgi?id=32972)
lshw

I have a Phenom II X6 booting 2.6.35.4 on Ubuntu.
On disabling 4 cores (hey, I only need 2 unless I'm doing some hardcore number
crunching) the system wouldn't boot at all - showing a message that related to
that it couldn't find the cores and would therefore halt.

cpuinfo:

processor    : [[0-5]]
vendor_id    : AuthenticAMD
cpu family    : 16
model        : 10
model name    : AMD Phenom(tm) II X6 1055T Processor
stepping    : 0
cpu MHz        : 800.000
cache size    : 512 KB
physical id    : 0
siblings    : 6
core id        : 5
cpu cores    : 6
apicid        : 5
initial apicid    : 5
fpu        : yes
fpu_exception    : yes
cpuid level    : 6
wp        : yes
flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb
rdtscp lm 3dnowext 3dnow constant_tsc rep_good nonstop_tsc extd_apicid
aperfmperf pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy
abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt cpb npt lbrv svm_lock
nrip_save
bogomips    : 5631.41
TLB size    : 1024 4K pages
clflush size    : 64
cache_alignment    : 64
address sizes    : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate [9]

lshw attached.

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