[RESEND PATCH v4 1/1] dt-bindings: arm-smmu: Add binding doc for Qcom smmu-500

Vivek Gautam vivek.gautam at codeaurora.org
Mon Dec 17 05:33:46 UTC 2018


On Thu, Dec 13, 2018 at 4:16 PM Will Deacon <will.deacon at arm.com> wrote:
>
> On Thu, Dec 13, 2018 at 02:35:07PM +0530, Vivek Gautam wrote:
> > Qcom's implementation of arm,mmu-500 works well with current
> > arm-smmu driver implementation. Adding a soc specific compatible
> > along with arm,mmu-500 makes the bindings future safe.
> >
> > Signed-off-by: Vivek Gautam <vivek.gautam at codeaurora.org>
> > Reviewed-by: Rob Herring <robh at kernel.org>
> > Cc: Will Deacon <will.deacon at arm.com>
> > ---
> >
> > Hi Joerg,
> > I am picking this out separately from the sdm845 smmu support
> > series [1], so that this can go through iommu tree.
> > The dt patch from the series [1] can be taken through arm-soc tree.
> >
> > Hi Will,
> > As asked [2], here's the resend version of dt binding patch for sdm845.
> > Kindly ack this so that Joerg can pull this in.
>
> Acked-by: Will Deacon <will.deacon at arm.com>

Thanks a lot Will for the Ack.

Regards
Vivek

>
> Joerg -- please can you take this on top of the pull request I sent already?
> Vivek included it as part of a separate series which I thought was going
> via arm-soc, but actually it needs to go with the other arm-smmu patches
> in order to avoid conflicts.
>
> Cheers,
>
> Will
>
> >  Documentation/devicetree/bindings/iommu/arm,smmu.txt | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > index a6504b37cc21..3133f3ba7567 100644
> > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> > @@ -27,6 +27,10 @@ conditions.
> >                    "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
> >                    "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
> >
> > +                  Qcom SoCs implementing "arm,mmu-500" must also include,
> > +                  as below, SoC-specific compatibles:
> > +                  "qcom,sdm845-smmu-500", "arm,mmu-500"
> > +
> >  - reg           : Base address and size of the SMMU.
> >
> >  - #global-interrupts : The number of global interrupts exposed by the
> > --
> > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> > of Code Aurora Forum, hosted by The Linux Foundation
> >
> _______________________________________________
> iommu mailing list
> iommu at lists.linux-foundation.org
> https://lists.linuxfoundation.org/mailman/listinfo/iommu



-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


More information about the iommu mailing list