Users of IOMMU_QCOM_SYS_CACHE?

[Sai Prakash Ranjan]

On 2019-10-24 16:51, Will Deacon wrote:
> On Thu, Oct 24, 2019 at 04:41:04PM +0530, Sai Prakash Ranjan wrote:
>> On 2019-10-24 16:21, Will Deacon wrote:
>> > In commit 90ec7a76cc4b ("iommu/io-pgtable-arm: Add support to use system
>> > cache") we added support for IOMMU_QCOM_SYS_CACHE which was merged into
>> > 5.3.
>> > This allows non-coherent devices to request an outer cacheable memory
>> > type.... except that nobody actually does this in mainline. I remember
>> > there
>> > being a potential DRM user but I don't know what happened to it.
>> >
>> > Given that this isn't actually exposed in the DMA API, I worry that
>> > we're
>> > just carrying part of an out-of-tree hack here and propose that we drop
>> > the flag altogether unless we get an upstream user, preferably by
>> > plumbing
>> > this into the DMA API via a new attribute.
>> >
>> > Thoughts?
>> >
>> 
>> There is definitely a user of this coming soon atleast for SC7180 SoC 
>> once
>> we have support for this SoC upstream.
> 
> Ok, I'm keen to see how you end up using this. How soon is soon?
> 

We have already started upstreaming for SC7180, so this should also come 
pretty soon. Sorry, I cannot tell the exact date but can make sure that 
your message reaches to appropriate team.

Thanks,
Sai

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