[llvmlinux] Paired registers in inline asm problem

Renato Golin renato.golin at linaro.org
Fri Jan 10 21:29:40 UTC 2014


On 10 January 2014 19:10, Tinti <viniciustinti at gmail.com> wrote:

> Is this still a problem? NO.
> If not, can we close the bug? YES.
>

Thanks, marked as fixed!

So far, that I know, we have these bugs on the ARM assembler:

In progress:
* Unwind code in Android uses .code 32 in inline assembly (
http://llvm.org/PR18231) (http://llvm-reviews.chandlerc.com/D2255)
* ARM integrated assembler generates incorrect nop opcode when switching
from arm to thumb mode (http://llvm.org/PR18019)

Reported:
* No support for delayed constants in ARM integrated assembler (
http://llvm.org/PR18202)
* ARM backend incorrectly limits smlal and umlal instructions to amv6 (
http://llvm.org/PR17647)
* arm: "Unknown mismatch!" assertion when using floating point on inline
assembler (http://llvm.org/PR17810)
* ARM assembler rejects LDRT/LDRHT/LDRBT with "error: instruction requires:
thumb2" (http://llvm.org/PR17720)
* ARM Assembler problem with ADR instruction (http://llvm.org/PR13241)
* Inline ARMv7 assembler (http://llvm.org/PR12926)

Let me know if you know of any other, and I'll add to my watch list.

cheers,
--renato
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